Download or read book Design and Evaluation of High-throughput Network-on-chip Router Architecture written by Chifeng Wang and published by . This book was released on 2012 with total page 175 pages. Available in PDF, EPUB and Kindle. Book excerpt: Technology scaling has driven multi-core development inside a chip. On-chip interconnect implementation becomes one of the major challenges when considering large scale of VLSI designs. Although bus architecture has prevailed for the past decade, it no longer can fulfill the stringent application requirements for designs with hundreds of cores. Therefore Network-on-Chip (NoC) architecture is proposed as a unified solution to tackle interconnection design problems. This dissertation proposed two innovative NoC architectures, DMesh and WNoC, to improve transmission performance, energy dissipation and network throughput. DMesh deployed diagonal channels adopts a quasi-minimal adaptive routing algorithm to balance traffic load and prevent congestion for a two-dimensional mesh network. A low-cost scalable congestion-aware mechanism was devised to resolve load imbalance and increase traffic accommodation. Significant performance improvement can be observed from simulation results. To further augment resource utilization efficiency, QoS provision was equipped to support differentiated service for versatile applications. QoS-aware router design was realized and synthesized to estimate implementation overhead in terms of area and power consumption. Furthermore, power-aware design was achieved by introducing a statistical power model. Experimental results have shown that transfer latency and throughput are greatly improved and overall system power dissipation is also decreased by the insertion of diagonal links. As hundreds or thousands of cores are integrated inside a chip, long distance communication and energy dissipation become more critical issues for designing interconnection networks. A hybrid infrastructure which incorporates on-chip wireless interconnect along with existing wired NoC was proposed. Customized wireless link insertion algorithm was studied. Simulated annealing optimization technique was employed to decide placement for wireless routers in order to minimize transmission time. Congestion management utilizing both global and local network conditions to make routing decision was devised. Balanced traffic helped to prevent congestion situations and enhanced network bandwidth utilization. Performance evaluation and feasibility analysis have demonstrated the proposed approach as a promising solution to deal with wide ranges of communication tasks.